Ho presentato la mia candidatura tramite un selezionatore. La procedura ha richiesto 2 settimane. Ho sostenuto un colloquio presso Intel Corporation (College Station, TX) nel mese di ott 2025
Colloquio
1 screening followed by 3 technical rounds. The screening touched on Comp arch, digital design, c programming and assembly x86. The technical rounds focused on more comp arch questions, and digital logic design.
Domande di colloquio [2]
Domanda 1
Design a circuit that takes 4 bit BCD as input and has the input times 5 as output
32Kb cache, 2 way assoc. and 64B line. what is the cache state and line state according to MESI when. Read 0x010F30 then write 0x880F00 then write 0x010F20
