Ho presentato la mia candidatura tramite l'università. La procedura ha richiesto una settimana. Ho sostenuto un colloquio presso AMD (Toronto, ON)
Colloquio
2 hour long interview for the Video Codec Team at AMD Markham. The manager will bring in a design and verification lead from his/her team to ask you questions. You will answer using a whiteboard and a marker.
Domande di colloquio [12]
Domanda 1
Design an XOR logic circuit using only "AND" and "NOT" gates. (Hint : Just remember Demorgan's law to convert an "OR" gate to and "AND")
Draw a FSM (Either Moore/Mealy) to detect the pattern 10110. It should output 1 if it detects the pattern. (Make sure it also handles the case "10110110")
How will you verify the functionality of your Verilog code? How would the test best setup look like in UVM? Talk about UVM Sequencers, Drivers, Monitors and Scoreboards.
Ho presentato la mia candidatura online. Ho sostenuto un colloquio presso AMD
Colloquio
Interviewers are very friendly, basic coding in Verilog and Python, questions on digital design concepts. Interviewers are interested in the details of past projects, in particular scripting, testing and debugging.
La procedura ha richiesto 3 settimane. Ho sostenuto un colloquio presso AMD (Sydney)
Colloquio
The interview process involved an initial screening interview which was technical and after clearing it a follow up by a main technical interview was held which delved deep into core topics.
Domande di colloquio [1]
Domanda 1
Describe your project and your method of approach.
Ho presentato la mia candidatura online. La procedura ha richiesto una settimana. Ho sostenuto un colloquio presso AMD nel mese di giu 2025
Colloquio
1 round, 1 hour long technical interview with engineer. Questions about digital design, verilog, past experience/internships, etc. Introduction to product and internship responsibilities. Coding and block diagram drawing, as well as waveform analysis.