Difference between signal and a variable in VHDL.
CPU and register level changes during a function call.
Memory model of an OS and where the global variables are stored.
Sequence detector
Some programming questions based on algorithm design

Question

Difference between signal and a variable in VHDL.
CPU and register level changes during a function call.
Memory model of an OS and where the global variables are stored.
Sequence detector
Some programming questions based on algorithm design

Anonimo · Accepted Answer

All the questions were very easy, but some were unexpected

Texas Instruments

Domanda di colloquio di Texas Instruments

Risposta di colloquio

Aziende seguite

Ricerche di lavoro