Write a uvm driver for a simple valid-ready protocol.
- When data is available assert the valid
- Keep the data stable and valid high until ready is asserted
- De-assert the valid once ready is asserted

interface if
input clk;
logic [15:0] Data;
logic Valid;
logic Ready;
endinterface

Question

Write a uvm driver for a simple valid-ready protocol. 
- When data is available assert the valid
- Keep the data stable and valid high until ready is asserted
- De-assert the valid once ready is asserted

interface if
input clk;
logic [15:0] Data;
logic        Valid;  
logic        Ready; 
endinterface

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