Domanda di colloquio di Intel Corporation
Write the Verilog code for a D-Flip Flop.
Risposta di colloquio
Anonimo
20 lug 2015
wire d, clk; reg q; always @(posedge clk) q <= d;
1
Write the Verilog code for a D-Flip Flop.
Anonimo
wire d, clk; reg q; always @(posedge clk) q <= d;