Vantaggi
The company provides digital circuit design and verification services for many well-known international clients. The projects are very interesting and use the latest technologies. The company hires people with all levels of experience and is particularly involved in cooperation with universities, so students can also benefit from dedicated training.
The most commonly used languages are UVM SystemVerilog, Verilog, SVA, Python, and C. The tools include those from Cadence, Synopsys, Siemens, Arteris, and others.
What matters most to me is the very friendly atmosphere—people are always willing to help each other, and management treats employees fairly. Projects change from time to time, so there’s no boredom, and there are always opportunities to learn new things.
Svantaggi
Sometimes the projects are very dynamic and demanding, and it’s necessary to work overtime.