Ho presentato la mia candidatura tramite segnalazione di un dipendente. La procedura ha richiesto 2 giorni. Ho sostenuto un colloquio presso AMD (Austin, TX)
Colloquio
After a brief phone screen, you move on to the on-site interview. These interviews are intense - generally 5 or 6 one hour interviews with engineers and managers of all levels. Very technical. Make sure to study up. If you get stuck, the interviewer will help spur you on - they want to know how you reason through a problem if you don't already know the answer.
Domande di colloquio [1]
Domanda 1
"Have you ever looked at how a real processor is designed?" (in response to a description of my graduate design project. Out of the 5 or 6 interviews, at most one will try to push your buttons, and maybe none. But be ready to handle yourself in case it happens.
Ho presentato la mia candidatura online. La procedura ha richiesto 2 settimane. Ho sostenuto un colloquio presso AMD (Londra, Inghilterra) nel mese di gen 2026
Colloquio
1. HR call - slary expectation, relocation, general q/a
2. CV based interview with hiring manager (focusing on past relative work experinence)
3. 4 Tech interviews (problem solving, algorithms, job specific tech skills)
Domande di colloquio [1]
Domanda 1
propose a design of the module based on provided specifications
Ho sostenuto un colloquio presso AMD (Texas City, TX)
Colloquio
It was smooth, i had three rounds with first being the screening. It was for internship so they mostly focused on intermediate level C++ programming for performance architecture role. It was a video interview via teams.
Telephone and video call,
Basics to projects
Resume based
Power sta front end
Back end
Synthesis
Vlsi
What are the challenge you will see in lower technology?
What are the inputs and outputs from the power analysis?
What are the checks after power planning is completed?
What are the power dissipation components? How to reduce them
Why float outputs are ignored but not float gates?
How do you calculate the core ring width?
What is IR drop? And how will you decrease this?
Domande di colloquio [1]
Domanda 1
What are the challenge you will see in lower technology?
What are the inputs and outputs from the power analysis?
What are the checks after power planning is completed?
What are the power dissipation components? How to reduce them
Why float outputs are ignored but not float gates?
How do you calculate the core ring width?
What is IR drop? And how will you decrease this?
