Ho presentato la mia candidatura tramite segnalazione di un dipendente. La procedura ha richiesto un giorno. Ho sostenuto un colloquio presso AMD (Bengaluru) nel mese di ago 2014
Colloquio
There were three rounds. I cleared first two rounds. Third round was with manager, and it was a brainstorming round. They can ask you about anything. And the question is not, what you did. But, why you did that. Means if you have a chosen a path A, then what all paths you considered, pros and cons of each path, how did you finally arrive at path A. And how sure you are, that path A was the best. It was a good experience overall.
Domande di colloquio [1]
Domanda 1
They asked about my project, basic and advance digital design, CMOS concepts, STA, C, Verilog
Ho presentato la mia candidatura online. La procedura ha richiesto 2 settimane. Ho sostenuto un colloquio presso AMD (Londra, Inghilterra) nel mese di gen 2026
Colloquio
1. HR call - slary expectation, relocation, general q/a
2. CV based interview with hiring manager (focusing on past relative work experinence)
3. 4 Tech interviews (problem solving, algorithms, job specific tech skills)
Domande di colloquio [1]
Domanda 1
propose a design of the module based on provided specifications
Ho sostenuto un colloquio presso AMD (Texas City, TX)
Colloquio
It was smooth, i had three rounds with first being the screening. It was for internship so they mostly focused on intermediate level C++ programming for performance architecture role. It was a video interview via teams.
Telephone and video call,
Basics to projects
Resume based
Power sta front end
Back end
Synthesis
Vlsi
What are the challenge you will see in lower technology?
What are the inputs and outputs from the power analysis?
What are the checks after power planning is completed?
What are the power dissipation components? How to reduce them
Why float outputs are ignored but not float gates?
How do you calculate the core ring width?
What is IR drop? And how will you decrease this?
Domande di colloquio [1]
Domanda 1
What are the challenge you will see in lower technology?
What are the inputs and outputs from the power analysis?
What are the checks after power planning is completed?
What are the power dissipation components? How to reduce them
Why float outputs are ignored but not float gates?
How do you calculate the core ring width?
What is IR drop? And how will you decrease this?
