The interview consisted of 5 technical questions and was heavily focused on core fundamentals of physical design. I was asked about key stages in the PnR flow and how power grid considerations are handled during placement and routing. The discussion touched on floorplanning, power grid construction, and the impact of routing resources on timing and power integrity. STA -> There was one detailed setup slack calculation problem. I had to compute setup slack. The interviewer expected clarity in defining launch/capture edges. The focus was on correct reasoning rather than just the final answer. Two questions were related to IR drop and overall power integrity challenges and the causes of IR drop in large SoCs. Overall, the interview was technical and fundamentals-driven. The emphasis was on understanding the physical design flow holistically and being able to reason through timing and power integrity trade-offs clearly. The interview was focused on conceptual clarity rather than memorization.