Ho presentato la mia candidatura tramite l'università. La procedura ha richiesto un giorno. Ho sostenuto un colloquio presso Cadence Design Systems (Vāranāsi) nel mese di ott 2012
Colloquio
“As an interview for Fresher, the interview included 1 Technical Round, and 1 HR round. The HR was itself with Technical Manager. A written test was conducted and 5% student were selected for the interview.
Domande di colloquio [1]
Domanda 1
Mostly Based on MOS and Basic Analog Circuits. Interview Depends highly on the team which you shall be interviewed for.
What if we dont give you any electronics work, would you join ? What if your work is mainly of software ?
Ho presentato la mia candidatura tramite segnalazione di un dipendente. Ho sostenuto un colloquio presso Cadence Design Systems (Noida)
Colloquio
First there was technical interview for 2 hrs which included my project work digital electronics and some coding questions.
Coding questions were from c
Digital was from counters and state machines
Ho sostenuto un colloquio presso Cadence Design Systems
Colloquio
There was 2 technical round of interview with one managerial and one hr round. Technical Interview questions were mainly focussed on digital design, rtl coding, FPGA related ques and ques on STA
Ho presentato la mia candidatura tramite un selezionatore. La procedura ha richiesto 3 giorni. Ho sostenuto un colloquio presso Cadence Design Systems (Noida) nel mese di apr 2021
Colloquio
After doing an internship for 10 months, i interviewed for a full time role in another team .
There were overall 4 rounds of interviews.
In round one questions about scripting language, makefiles, parasitics, Electromigration and IR drop.
( acc to my resume), Previous internship experiences.
Round 2 with the manager : MOSFET, Digital electronics etc.
Round 3 with Director: Behavioural round.
Round 4 : Again a technical round covering all the things like Digital Electronics, layout, ASIC design flow, DRC, LVS. etc.
Domande di colloquio [3]
Domanda 1
With sine wave at gate of inverter, in detail answe, mode in which each pmos and nmos will operate along the sine wave input.
