Ho presentato la mia candidatura tramite l'università. La procedura ha richiesto un giorno. Ho sostenuto un colloquio presso Infineon Technologies (Phagwāra) nel mese di gen 2020
Colloquio
I was registered in the Infineon internship by in campus placement drive that was held on 24 January 2020. The experience of placement drive was terrible because, first the job requirements were not mentioned properly second they took so long to start the placement drive, the given time for PPT(Pre Placement Talk) was 5 PM but started at 6:40 PM and online exam at 6:30 PM but started around 8:30 PM. I suggest of someone really wants to work in Infineon go ahead they'll offer a lucrative package but for me it was just a horrible experience.
Ho presentato la mia candidatura online. La procedura ha richiesto una settimana. Ho sostenuto un colloquio presso Infineon Technologies nel mese di dic 2025
Colloquio
I was contacted by the HR representative via phone to schedule an interview. The interview was conducted online through Microsoft Teams. During the interview, I was asked about my background, academic experience, technical skills, and interest in the internship role. The interviewer also explained the job scope and company expectations.
Ho sostenuto un colloquio presso Infineon Technologies (Leominster, MA)
Colloquio
The interview process for a summer internship was fairly straight-forward. I applied in late August, interviewed throughout October (2 rounds) and got my offer during late September. Each interview had a mix of behavioral and technical questions, employees were organized and professional.
Ho presentato la mia candidatura tramite l'università. La procedura ha richiesto un giorno. Ho sostenuto un colloquio presso Infineon Technologies (Bengaluru) nel mese di ott 2025
Colloquio
The interview process consisted of two technical rounds followed by one HR round. Questions were mostly easy to medium level and relevant to the intern position. Overall, the process was smooth and well-structured.
Domande di colloquio [1]
Domanda 1
Synthesizing given verilog code into netlist/functional blocks
