Ho presentato la mia candidatura online. La procedura ha richiesto un giorno. Ho sostenuto un colloquio presso Intel Corporation (Bengaluru) nel mese di mar 2015
Colloquio
1 written test including basic electronics and aptitude, followed by 2 and 3 technical round interview process related to the VLSI and Physical Verification and STA and questions related to your resume and 1 HR round including some non technical question. All question are basics of digital and electronics and VLSI and CMOS.
Ho sostenuto un colloquio presso Intel Corporation (Petah Tikva)
Colloquio
very nice people. given 2 question one on system of the group and one for coding in binary search and recursion. we started by little talking and then a little bit on one of the project and then 2 questions
Domande di colloquio [1]
Domanda 1
1. given graph and car with light sensor and we want to find the right spot of the dot on the graph. it was binary search classical
Ho presentato la mia candidatura online. Ho sostenuto un colloquio presso Intel Corporation (Bengaluru) nel mese di mag 2026
Colloquio
Deep whiteboard interview , was asked to draw graphs for non ideal characteristics for cmos design and pvt corners. Questions related to project and physical design concepts. Focused on semiconductor physics and technical depth in each answer.
Domande di colloquio [1]
Domanda 1
was asked to draw graphs for non ideal characteristics for cmos design and pvt corners.Questions related to project and physical design concepts. Focused on semiconductor physics and technical depth in each answer.
Ho sostenuto un colloquio presso Intel Corporation (Austin, TX)
Colloquio
This was the second round lasted about an hour or so. The first round was mostly about my work as I had 3 year experience and I had to walk them through the projects I did etc..,.
Domande di colloquio [1]
Domanda 1
If the combination logic between 2 FF's is cut like an interface, how do you set_input_delay and set_output_delay for left and right partitions. The clock is the same for both.
