Ho presentato la mia candidatura tramite l'università. Ho sostenuto un colloquio presso Juniper Networks
Colloquio
First a Technical quiz, Aptitude quiz and coding round were conducted on Hackerrank, followed by in-person interviews after the declaration of the results. The first round was damn too easy for me, since I am proficient in STL, but the interview experience wasn't what I had envisioned keeping in view the company's reputation.
Domande di colloquio [1]
Domanda 1
Q: Given a string, generate its next lexicographic permutation.
Q: Convert a link list of bits to an integer.
Q: Merge two std::vector<int>'s and return the resultant vector<int>.
Ho presentato la mia candidatura tramite l'università. La procedura ha richiesto una settimana. Ho sostenuto un colloquio presso Juniper Networks (Vellore) nel mese di mar 2025
Colloquio
Good experience, Full of computer Networking questions, Operating System, Data Base Management System , Data Structure and Algorithm and projects and object oriented programming questins.
Be thorough with Computer networks
Ho presentato la mia candidatura tramite l'università. La procedura ha richiesto un giorno. Ho sostenuto un colloquio presso Juniper Networks (Collegeville, PA) nel mese di ott 2024
Colloquio
They basically ask you on c++, c and python
we had on campus interview experience. They even asked about networking and sql.Basically it includes everything if u know basics properly u can ace it. If u r from java background and u r focusing on this company then start your c++ journey now
Ho presentato la mia candidatura tramite l'università. Ho sostenuto un colloquio presso Juniper Networks (Bengaluru) nel mese di giu 2023
Colloquio
It was on campus process, online interview was taken in 3 rounds, they asked question on digital design, verilog and some aptitude questions was there, HR round was like a chit chat, One of the techinal round was very tough
Domande di colloquio [1]
Domanda 1
Write code for Series shift regester, questions on SRAM etc Medium to Advanced level question on Digital Design, Duty cycle conversion questions, Verilog codes