Ho sostenuto un colloquio presso Microchip Technology
Colloquio
First interview with Manger. 30min
State machines, multiplexer, etc in system verilog
basic concepts like hold time and setup time
race conditions
metastability
Answered questions about the resume and projects
Domande di colloquio [4]
Domanda 1
Draw the state transition digram for the following FSM.
