Ho presentato la mia candidatura online. Ho sostenuto un colloquio presso Wipro
Colloquio
Strong hands-on experience in RTL coding using VHDL/Verilog HDL, Simulations, working knowledge in Digital circuit design, high speed interface circuits, system integration testing and Lab testing. Responsible for complete product development and deliverables, right from Architecture and spec finalization to FPGA proto-type targeted on Xilinx. Kintex 7, including Architecture, Functional Specifications Documentation,RTL Design documentation, RTL, STA, Simulations, Synthesis, Good Understanding of ASIC Design flow and Customer Support.
Ho presentato la mia candidatura tramite un selezionatore. La procedura ha richiesto una settimana. Ho sostenuto un colloquio presso Wipro
Colloquio
Run through the basic hardware level questions on signal integrity and timing violation checks.
basic questions on the previous projects
Dynamic memory allocation program
Next round was Managerial level where he tried to check the problem solving skills
Ho presentato la mia candidatura online. La procedura ha richiesto un giorno. Ho sostenuto un colloquio presso Wipro (Bengaluru) nel mese di feb 2014
Colloquio
Nice calm and friendly staff. Did give me my own time to answer their question in detail. Was appreciative of what I had done earlier in my career too. They mostly covered some of the practical things I did in past and few theoretical questions too
Domande di colloquio [1]
Domanda 1
Mostly fundamental questions on HW design and validation