Ho presentato la mia candidatura online. Ho sostenuto un colloquio presso Xilinx (San Jose, CA) nel mese di gen 2019
Colloquio
1 Telephonic Interview + Day long On-site Interview Process(4 TIs + HR)
Overall Topics to prepare:
Digital(Muxes, FFs, Timing Params, Synchronizers and Asyn FIFOs, Clock domain crossings)
Verilog Coding Basics (Case, if-else, Practical Design problems)
SV Basics(Tasks Process, Fork Join)
Comp Arch(Pipelining, Load store Arch)
Scripting(Python/ Perl/ Tcl anyone)
Domande di colloquio [1]
Domanda 1
#Telephonic Round:
Simple digital, verilog, timing Qs (30mins)
#Onsite Interview:(45 mins each)
Round 1:
Simple Digital Qs, Verilog code (Case , if-else difference, Blocking-Nonblocking difference, Unintensional latch problem), Power reduction techniques(Clk Gating) + extended Qs on same topic
Previous work related Qs , Module's overall working
Round 2:
Verification basics like:
What is fork -Join?
Tasks and fns
Pass by value , Pass by Refn
Logic behind Linked list entry removal(How address pointer is changed)
Round 3:
Verilog code for shift left, shift right, parallel load functionality
Some logical puzzales
Digital concepts like basic gates using Mux, Gate Reduction etc.
Round 4
More on Power reduction
Setup and Hold time eqs and Violation removal techniques
Diffn betn: Glich and Jitter and skew
It was easy and people were very good. Didn't seem to be tedious. It took just one hour and few questions, and rest it was easy. It was easy and people were very good. Didn't seem to be tedious. It took just one hour and few questions, and rest it was easy.
Ho presentato la mia candidatura online. Ho sostenuto un colloquio presso Xilinx nel mese di mar 2021
Colloquio
Technical screen followed by panel .Took three weeks from start to get the offer. The experience was overall very good.They tested the logic design basics, system verilog skills and analytical ability.
Ho presentato la mia candidatura tramite l'università. La procedura ha richiesto un giorno. Ho sostenuto un colloquio presso Xilinx (Kharagpur, West Bengal) nel mese di dic 2020
Colloquio
It was very smooth in campus placements. They asked me first about what xilinx does and then went MTech project and technical questions about STA, verilog, C programming, ASIC design flow etc.
Domande di colloquio [1]
Domanda 1
What does xilinx do? and why are you interested in this company?
