Passed the initial interview, then was asked to do 4 more interviews, Was asked to accommodate to their schedule and interview at 8am for 3 days straight, with 2 interviews in one day. Then on the final interview, interview was cut short and interviewer said I was too junior for role.

3 interviews, all of them 90% technical, with 2 different engineers from Security IP team and your future boss. First interview was with my future boss, with an overall talk about how the team works, which are the current products, where will I fit the most if everything goes well, background, my personal desires, etc. Then switch to technical questions, more related to key concepts of ASIC Design in general (not particular products or code). Power aspects, synthesis, design flow, CDC. The other 2 interviews were 100% techincal, with more specific questions about Digital Design modules/architectures: FIFOs, memories, datapath, together with Cybersecurity protocols basics