Ho presentato la mia candidatura tramite l'università. Ho sostenuto un colloquio presso Xilinx (New York, NY) nel mese di dic 2012
Colloquio
phone interview followed by full day onsite intervidw. 4 - 5 interviewers. Very warm and friendly panel. Talked about projects, basic verilog and circuit design quesions.phone interview followed by full day onsite intervidw. 4 - 5 interviewers. Very warm and friendly panel. Talked about projects, basic verilog and circuit design quesions.
Ho presentato la mia candidatura online. Ho sostenuto un colloquio presso Xilinx (Longmont, CO) nel mese di feb 2022
Colloquio
2 rounds, mostly resume-based. Deep understanding of projects mentioned in the resume. Questions about the company, your interests in roles, understanding of basic Xilinx software. Some knowledge about the product and teams. In my case it was Versal ACAPs.
Domande di colloquio [1]
Domanda 1
Explain Hardware Interrupts and experience with cache design, cache coherence.
There was a Technical Interview . The questions were fairly basic - mostly on FPGA design. This was followed by a Managerial Interview. Managerial interview was on culture and fit.
Ho presentato la mia candidatura tramite l'università. La procedura ha richiesto un giorno. Ho sostenuto un colloquio presso Xilinx (Hyderabad)
Colloquio
2 technical + 1 HR. Project related questions from college. More focus on FPGA design questions. VHDL and Verilog language review and sample programs. The process is fairly easy and made comfortable by the interviewers. Overall, if basics are clear, one should be able to crack through.
